Mr J. (Jun) Xiao MSc


  • Faculty of Science
    Informatics Institute
  • Visiting address
    Science Park A
    Science Park 904  
  • Postal address:
    Postbus  94323
    1090 GH  Amsterdam
  • J.Xiao@uva.nl

2017

  • Xiao, J., Altmeyer, S. J., & Pimentel, A. D. (2017). Schedulability Analysis of Non-preemptive Real-time Scheduling for Multicore Processors with Shared Caches. In Proc. of the IEEE Real-Time Systems Symposium (RTSS '17)
  • Xiao, J., Pimentel, A. D., & Lipari, G. (2017). SysRT: A Modular Multiprocessor RTOS Simulator for Early Design Space Exploration. In Proc. of the 17th Int. Conference on Embedded Computer Systems: Architectures, MOdeling and Simulation (SAMOS '17)

2016

  • Xiao, J., Chiaradonna, S., Di Giandomenico, F., & Pimentel, A. D. (2016). Improving Voltage Control in MV Smart Grids. In Proc. of the 7th IEEE International Conference on Smart Grid Communications
  • Xiao, J., & Buttazzo, G. (2016). Adaptive Embedded Control for a Ball and Plate System. In Proceedings of the 8th International Conference on Adaptive and Self-Adaptive Systems and Applications (ADAPTIVE 2016)
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  • No ancillary activities

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